SoCCanvasThirdDemo – Clock Frequency Setting
Frequency는 설정값이 아니라 시스템 상태입니다.
🧭 How to design SoC with SoC Canvas
Episode 3에서는
설계된 Clock 구조에 Frequency Setting이 입혀지는 과정을 보여드립니다.
Clock 구조는 고정된 Hardware이지만,
Frequency Setting에 따라서 서로 다른 상태를 가질 수 있습니다.
Canvas에 입력된 Frequency Setting 상태는
✔️ Multiple DVFS Level 설정
✔️ Corner별 SDC 생성
✔️ DFT mode의 Clock 설정
✔️ Clock Debugging
등 여러가지로 응용될 수 있습니다.
🎥 Episode 3: Clock Frequency Setting
▶️ 전체 데모 영상이 궁금하신 분들은 댓글이나 DM 주시면 링크를 공유해드리겠습니다.
SoCCanvasThirdDemo – Clock Frequency Setting
Frequency is not a setting value, but a system state.
🧭 How to design SoC with SoC Canvas
In Episode 3,
we demonstrate the process of applying frequency settings to the designed clock structure.
Although the clock structure is fixed hardware,it can have different states depending on the frequency setting.
The frequency setting state input into the Canvascan be applied in various ways, such as:
✔️ Multiple DVFS Level configuration
✔️ Corner-specific SDC generation
✔️ Clock configuration in DFT mode
✔️ Clock debugging
🎥 Episode 3: Clock Frequency Setting
▶️ If you are interested in the full demo video, please leave a comment or send a DM, and we will share the link.
💡 Summary
In this video, we explore how frequency becomes a system-level behavior once the clock structure is defined.
You can configure and visualize frequencies across the entire clock tree,
while observing real-time propagation through PLLs, MUXes, and dividers.
We also demonstrate:
– Multi-profile DVFS management
– Real-time frequency tracking
– Silicon-to-diagram debugging using SFR dump data
📌 Key moments:
00:00 – Introduction to Clock Frequency Configuration
00:13 – PLL Frequency Setup: From Reference Clock to Target Output
00:48 – Routing through MUXes & Dividers for Precise Frequency Control
01:16 – Real-time Visualization: Monitoring Frequencies Across the Tree
01:50 – Multi-Profile Management: Configuring DVFS & Sign-off Corners (NM, OD, UD, etc.)
03:30 – The Challenge of Clock Debugging in Large-Scale SoCs
03:53 – Silicon-to-Diagram Mapping: Importing CMU SFR Dump Data for Visual Debugging